Sundance Launches High-Performance FMC-ADC500CD for Advanced Signal Processing Applications

Cutting-edge HPC FMC module that offers 4 channels of high sampling rate and high-resolution ADC and DAC. Both the ADC and DAC interface to a carrier board using a JESD204B interface.

 

Applications:

  • Applications
  • Defence
  • Intelligence
  • Wireless communications
  • Broadcast equipment
  • Medical equipment
  • Test and measurement equipment

Chesham, United Kingdom [August 20, 2024]: Sundance, a leader in high-performance signal processing solutions, today announced the launch of its cutting-edge FMC-ADC500CD board. This High Pin Count (HPC) FMC module offers four channels, each with high-speed, high-resolution ADC and DAC capabilities. It is ideal for a wide range of applications requiring precise and rapid data conversion.

The FMC-ADC500CD features two dual-channel ADS54J60 ADCs from Texas Instruments, providing four ADC channels with 16-bit resolution at up to 1 GSPS. Complementing this, the board includes a quad-channel DAC39J84 DAC, offering four channels capable of 16-bit resolution at 2.8 GSPS. Both ADC and DAC interfaces utilize the high-speed JESD204B standard, ensuring seamless integration with carrier FPGA boards.

“Our FMC-ADC500CD represents a significant advancement in flexible signal processing capabilities. Its combination of high-speed data conversion and on-the-fly reconfigurability makes it an invaluable tool for developers across various industries. We’re particularly proud of the ability to switch between AC and DC coupling for the ADC inputs in real-time, offering unprecedented adaptability in signal handling.”

Flemming Christensen

Managing Director, Sundance

The board’s clock management is handled by the advanced HMC7044 from Analog Devices, providing precise synchronization and low-latency performance. This feature, combined with the board’s JESD204B subclass 1 synchronization capability, ensures accurate timing crucial for applications in fields such as telecommunications, scientific research, and advanced instrumentation.

“The FMC-ADC500CD is fully compatible with AMD FPGA platforms, ensuring seamless integration into existing development ecosystems. We’re excited to see Sundance leveraging the power of AMD FPGAs with their FMC-ADC500CD board. This combination offers developers a robust and flexible platform for creating high-performance data conversion solutions across a multitude of applications.”

Rhett Whatcott

Director, Global Training & Enablement, AMD

The FMC-ADC500CD is poised to become an essential component in various high-performance signal processing applications, including wireless communications, broadcast equipment, medical devices, and advanced test and measurement systems. Its versatility and high-speed capabilities make it suitable for any application requiring rapid and precise analogue-to-digital or digital-to-analogue conversion.

For more information about the FMC-ADC500CD and its capabilities, please visit the Sundance Store or contact sales@sundance.com.

Features:

  • Two dual-channel ADS54J60 ADCs: These are 16-bit, 1-GSPS ADCs that support JESD204B interface. They can operate at various sample rates and enable decimation for lower bandwidth applications.
  • One quad-channel DAC39J84 DAC: This is a 16-bit, 2.8-GSPS DAC that supports JESD204B interface. It can generate direct IF or RF signals with high dynamic range and low distortion.
  • JESD204B interface via HPC connector: This provides 8 lanes of 12-Gbps data transfer per lane between the ADCs, DAC, and FPGA.
  • HMC7044 clock generator: This is a high-performance, 3.2-GHz clock generator that provides multiple clock outputs with SYSREF signals. It can clock JESD204B devices with subclass 1 synchronisation.
  • External trigger input: This allows adding time stamps to the sample stream from the ADCs for accurate timing measurements. It has a logic LVTTL 3.3-V level.
  • External clock input: This can be used as a reference clock or a main device clock input for the board. It can be connected to an external source or an internal VCXO or TCXO.
  • 10 SSMC input connectors: These are used for the following purposes:
  • 4 for single-ended input of ADC signal, with a frequency range of DC to 500 MHz.
  • 4 for single-ended output of DAC signal, with a frequency range of 10 to 1.25 GHz.
  • 1 for trigger input, with a logic level.
  • 1 for clock input, which can be used as a reference for the DAC and ADC via PLL.
  • JESD204B subclass 1 capability: This means that the board can achieve precise synchronisation and deterministic latency between multiple JESD204B devices using REF CLK and SYSREF signals.
  • 100-MHz ±12-ppm onboard VCXO: This is a voltage-controlled crystal oscillator that provides a stable and low-jitter reference clock for the board.
  • 10-MHz ±1.5-ppm onboard TCXO: This is a temperature-compensated crystal oscillator that provides another option for a reference clock for the board.
  • RF inputs: These are single-ended, 50-Ohm, 1.9-Vpk-pk inputs that can be DC or AC coupled (selected by firmware).
  • RF outputs: These are single-ended, 50-Ohm, 1-Vp-p outputs that can generate IF or RF signals.
  • Vadj supported voltages: These are 1.8 V, 2.5 V, and 3.3 V, which can be used to power different components on the board.
  • Power consumption: This is TBD (to be determined).

Block Diagram