Optimizing Security and Efficiency in Engineering:

A Deep Dive into Nolam Embedded Systems’ IP Cores

In the ever-evolving world of embedded systems, the quest for more efficient, secure, and faster data processing capabilities is never-ending. Nolam Embedded Systems stands at the forefront of this innovation wave, offering a suite of IP cores designed to meet the rigorous demands of modern communication systems and beyond. This blog post explores the cutting-edge NES-IPCORES, showcasing their applications and the substantial benefits they bring.

All IP CORES provided by Nolam Embedded systems work on any FPGAs, the IP CORES can also be implemented into an ASIC.


Business case: Secure banking transactions

Algorithms for data encryption are one of the most important parts of modern communication systems. The NES-IPCORE-TDES is implemented as an IP core with AXI interface because of constant growth of data transfer requirements in modern embedded systems, in order to improve their capability. Beside details about the implementation of these algorithms, acceleration gain, compared to the software implementation. It is shown that the performance of FPGA implementation of the IP core is approximately 13 to 416 times faster compared to the software implementation using standard ARM based architecture, and comparable to that of modern Intel processors with specific Instruction Set.

The NES-IPCORE-TDES is used with an FPGA PCIe ARTIX-7 board to secure online banking transactions.


Business case: Automobile test bench

When it comes to seamlessly infusing cutting-edge Controller Area Network (CAN) capabilities into diverse systems, look no further than Nolam Embedded systems NES-IPCORE-CAN . This engineering marvel can be harnessed as a standalone powerhouse, an integral part of an ASIC, or an FPGA marvel. Guided by the ISO11898-1:2015 standard, it ushers in flawless communication aligned with industry-favorite protocols, making it a game-changer for engineers and innovators. Engineered to cater to both Classical CAN and the dynamic CAN FD and CAN-XL

NES-IPCORE-CANbus with the NES-FMC-CAN and a PCIe STRATIX 10 FPGA with an FMC slot is used as a communication system protocol for an automobile test bench.


Business case: Securing government data.

Nolam Embedded systems NES-IPCORE-RSA512-4096 IP core is a versatile IP core for all asymmetric cryptographic operations. It enables any SoC, ASIC and FPGA to support efficient execution of RSA, ECC-based algorithms and more. The IP core is ready for all ASIC and FPGA technologies.

The NES-IPCORE-RSA512-4096 with an AGILEX-7 module is used as a secure system to protect government data.


Business case: Avionic test system


ARINC-429 defines the standard requirements and protocols for the transportation of digital data between avionic systems in commercial aircraft. Nolam Embedded Systems
NES-IPCORE-A429 available in Transmit/ Receive ARINC-429 channels or just Receive or transmit channels . It enables any SoC, ASIC and FPGA to support efficient execution of the ARINC-429 Avionic protocol standard for civil avionic applications.

NES-IP CORE-A429 with the NES-FMCA429 with an ARTIX-7 FPGA VPX board with an FMC slot is used as a testing tool for an avionic maintenance system



MIL-STD-1553 is a military standard published by the United States Department of Defense that defines the mechanical, electrical, and functional characteristics of a serial data bus. It was originally designed as an avionic data bus for use with military avionics, but has also become commonly used in spacecraft on-board data handling (OBDH) subsystems, both military and civil, including use on the James Webb space telescope. It features multiple (commonly dual) redundant balanced line physical layers, a (differential) network interface, time-division multiplexing, half-duplex command/response protocol, and can handle up to 31 Remote Terminals (devices); 32 is typically designated for broadcast messages.
Nolam embedded systems NES-IPCORE-M1553 available in BUS controller ,Remote terminal and Monitoring BC/RT/MT or just BC bus controller or Remote terminal . It enables any SoC, ASIC and FPGA to support efficient execution of the MIL-STD1553 protocol standard for Military avionic and defense applications.


Nolam Embedded Systems’ suite of IP cores exemplifies the innovation and technical prowess necessary to meet the challenges of modern embedded systems. From enhancing data security and processing speed to ensuring reliable and efficient communication across various domains, these IP cores are foundational elements that propel the embedded sector forward.

Whether for securing online banking transactions, advancing automotive testing, protecting government data, optimizing avionics systems, or streamlining military communications, Nolam Embedded Systems delivers the technological solutions needed to thrive in today’s fast-paced, interconnected world.


  • Independent Receivers (Rx) with FIFO
  • Independent Transmitter ( Tx ) with FIFO
  • Decoding signals interface type
  • 16 Bit Data bus
  • Direct addressing of all Registers
  • Support all ARINC 429 Data Rate Transfer
  • Multi-Label Capability
  • Parity Control : Odd, Even, No Parity, Interrupt Capability
  • Independent Interrupt Request Line for Rx and Tx Functions
  • System clock 70 MHz can be customized


  • CAN Specifications Support CAN 2.0,CAN FD & CAN XL (ISO 11898 1.2015, plus earlier ISO and Bosch specifications) TTCAN (ISO 11898 4 level 1)
  • Optimized for AUTOSAR and SAE J1939
  • Error Analysis features enable diagnostics, system maintenance, and system optimization.
  • Listen Only Mode enables CAN bus traffic analysis and automatic bit rate detection.
  • Loop back mode for self-testing
  • Time-stamping support, compliant to CiA’s 603 specification
  • Flexible Message Buffering and Filtering, Configurable number of receive buffers
  • One high-priority transmit buffer, Configurable number of lower priority transmit buffers
  • FIFO or priority mode for transmit buffers
  • Configurable number of independently programmable 29 bit acceptance filters, 1 to 16


  • MIL STD1553 intellectual property for FPGA and ASIC
  • Suitable for any MIL STD1553 BC,RT,MT implementation
  • Local bus or AXI interface
  • Small FPGA area utilization
  • Modular Architecture allowing flexible implementations
  • Provided with verification environment
  • Based on vendor and technology independent VHDL code
  • Configuration available Simple Front end ,Local Bus and AXI interface

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