NES-IPCORE-TDES – IP CORE TRIPLE DES

Business case: Secure banking transactions

Algorithms for data encryption are one of the most important parts of modern communication systems. The NES-IPCORE-TDES is implemented as an IP core with AXI interface because of constant growth of data transfer requirements in modern embedded systems, in order to improve their capability. Beside details about the implementation of these algorithms, acceleration gain, compared to the software implementation. It is shown that the performance of FPGA implementation of the IP core is approximately 13 to 416 times faster compared to the software implementation using standard ARM based architecture, and comparable to that of modern Intel processors with specific Instruction Set.

The NES-IPCORE-TDES is used with an FPGA PCIe ARTIX-7 board to secure online banking transactions.

NES-IPCORE-CAN

Business case: Automobile test bench

When it comes to seamlessly infusing cutting-edge Controller Area Network (CAN) capabilities into diverse systems, look no further than Nolam Embedded systems NES-IPCORE-CAN . This engineering marvel can be harnessed as a standalone powerhouse, an integral part of an ASIC, or an FPGA marvel. Guided by the ISO11898-1:2015 standard, it ushers in flawless communication aligned with industry-favorite protocols, making it a game-changer for engineers and innovators. Engineered to cater to both Classical CAN and the dynamic CAN FD and CAN-XL

NES-IPCORE-CANbus with the NES-FMC-CAN and a PCIe STRATIX 10 FPGA with an FMC slot is used as a communication system protocol for an automobile test bench.

NES-IPCORE-RSA 512-4096

Business case: Securing government data.

Nolam Embedded systems NES-IPCORE-RSA512-4096 IP core is a versatile IP core for all asymmetric cryptographic operations. It enables any SoC, ASIC and FPGA to support efficient execution of RSA, ECC-based algorithms and more. The IP core is ready for all ASIC and FPGA technologies.

The NES-IPCORE-RSA512-4096 with an AGILEX-7 module is used as a secure system to protect government data.

NES-IPCORE-A429

Business case: Avionic test system

IP CORE ARINC-429 Rx/Tx

ARINC-429 defines the standard requirements and protocols for the transportation of digital data between avionic systems in commercial aircraft. Nolam Embedded Systems
NES-IPCORE-A429 available in Transmit/ Receive ARINC-429 channels or just Receive or transmit channels . It enables any SoC, ASIC and FPGA to support efficient execution of the ARINC-429 Avionic protocol standard for civil avionic applications.

NES-IP CORE-A429 with the NES-FMCA429 with an ARTIX-7 FPGA VPX board with an FMC slot is used as a testing tool for an avionic maintenance system

NES-IPCORE-M1553

IP CORE MIL-STD1553 BC/RT/MT

MIL-STD-1553 is a military standard published by the United States Department of Defense that defines the mechanical, electrical, and functional characteristics of a serial data bus. It was originally designed as an avionic data bus for use with military avionics, but has also become commonly used in spacecraft on-board data handling (OBDH) subsystems, both military and civil, including use on the James Webb space telescope. It features multiple (commonly dual) redundant balanced line physical layers, a (differential) network interface, time-division multiplexing, half-duplex command/response protocol, and can handle up to 31 Remote Terminals (devices); 32 is typically designated for broadcast messages.
Nolam embedded systems NES-IPCORE-M1553 available in BUS controller ,Remote terminal and Monitoring BC/RT/MT or just BC bus controller or Remote terminal . It enables any SoC, ASIC and FPGA to support efficient execution of the MIL-STD1553 protocol standard for Military avionic and defense applications.