PCIe Architecture: A City in Motion

Imagine a vibrant city where communication is key. In the PCIe (Peripheral Component Interconnect Express) world, the Root Complex (RC) is the city hall—coordinating all operations—while Endpoints (EPs) are the citizens and businesses that make the city run.

Root Complex (RC): The City Hall

The Root Complex is the central authority of the PCIe hierarchy, typically embedded in the CPU or chipset.

Key Roles:

  • Master of Communication: Initiates all PCIe transactions.

  • Bridge to CPU/Memory: Converts CPU memory requests into PCIe operations.

  • Device Discovery & Configuration: Scans and sets up connected devices at boot.

  • Resource Manager: Allocates memory, I/O space, and manages interrupts.

  • Error & Power Management: Handles PCIe errors and oversees power states.

Analogy: Like a conductor leading an orchestra, the RC ensures all components (Endpoints) operate in sync.

 

Endpoints (EPs): Citizens and Businesses

Endpoints are devices at the edge of the PCIe hierarchy—GPUs, SSDs, NICs, and more.

Key Traits:

  • Responsive Role: React to RC requests; some support peer-to-peer communication.

  • Dedicated Functionality: Each EP performs a unique task (e.g., storage, graphics).

  • Configuration Space: Holds critical data like vendor ID, memory addresses, and interrupt settings.

  • Resource Needs: Depend on memory, I/O allocations made by the RC.

Analogy: Like residents and businesses, each EP has a defined role and depends on city hall for resources and infrastructure.

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Boot-Up: Bringing the PCIe City to Life

During system startup, the BIOS/UEFI—with the RC—configures the PCIe hierarchy.

1. Discovery:

  • RC scans the PCIe bus tree starting at bus 0.

  • Identifies devices via configuration space (Vendor ID).

2. Resource Allocation:

  • Assigns memory/I/O regions and interrupt paths to each Endpoint.

3. Configuration:

  • Sets unique BDF (Bus, Device, Function) IDs.

  • Programs Base Address Registers (BARs).

  • Enables bus mastering and memory/I/O access.

4. Handover:

  • BIOS/UEFI passes control to the OS, which loads drivers and may fine-tune configuration.

Core Technologies:

  • Configuration Space: Stores device capabilities and settings.

  • Enumeration: Systematic discovery of PCIe devices.

  • BARs: Define where devices’ memory and I/O regions reside.

 

FPGAs as RC or EP: Flexible Roles

FPGAs are uniquely versatile—they can be configured as either Root Complex or Endpoint.

  • As Endpoints: Used for acceleration, custom peripherals, or interfacing.

  • As Root Complexes: Ideal for custom PCIe systems in HPC or networking.

 

Custom PCIe Solutions from Sundance

Sundance offers adaptable PCIe boards that can function as RCs or EPs. Whether you need a standard solution or a fully custom design, we provide:

  • Configurable hardware

  • Low or zero NRE costs (based on volume)

  • Expert engineering tailored to your application

Let’s build your ideal PCIe system. Contact us today to discuss your project.

SMT835-ZU47DR-2 – PCIe ZynqRF Board

One of the many PCIe boards available in the Sundance store, the SMT835 is a PCI express ZynqRF system comprised of the TEB0835 carrier board and the TE0835-02-TXE21-A RFSoC module.

 

Key Features and benefits of the system:

  • High-performance processing (combination of ARM cores and FPGA fabric).
  • Integrated RF capabilities for real-time signal generation and acquisition.
  • PCI Express interface for high-speed data transfer.
  • Scalability and programmability for custom applications.
SMT835 Store Page