s406 PMC Module; Virtex II FPGA; 16M x 8 Flash; 16MBytes DDR or QDR SRAM


The SMT406 is a Processor PMC module aimed at very high performance digital signal processing and data acquisition. It can also be used for ASIC prototyping and intellectual property development.

It delivers the maximum possible performance from the Xilinx Virtex-II FPGA by providing 64-bit high bandwidth interfaces to six memory banks, ample power and cooling on-board, and very high frequency programmable clocks up to 500MHz.

The Processor PMC format is compatible with PMC and provides extended height for high current power supplies and fan cooler or heatsink.

s406btmThe SMT406 is available in the following options:

SMT406-4000-4 (Virtex II 2V4000-4 FPGA)
SMT406-4000-5 (Virtex II 2V4000-5 FPGA)
SMT406-4000-6 (Virtex II 2V4000-6 FPGA)
SMT406-6000-4 (Virtex II 2V6000-4 FPGA)
SMT406-6000-5 (Virtex II 2V6000-5 FPGA)
SMT406-6000-6 (Virtex II 2V6000-6 FPGA)
SMT406-8000-4 (Virtex II 2V8000-4 FPGA)
SMT406-8000-5 (Virtex II 2V8000-5 FPGA)


  • Processor PMC module (PMC with extra height for high current power supplies and fan cooler or heatsink)
  • Virtex-II XC2V4000-4
  • 64-bit data paths
  • Four banks of 4MBytes DDR or QDR SRAM for a total of 16MBytes
  • One bank of 32MBytes DDR SDRAM
  • One bank of 128MBytes SDRAM
  • One bank of 16MBytes Flash
  • Very high performance PCI controller
  • Low jitter programmable clocks up to 500MHz
  • Multiple I/O options, including one SHB Interface on a Header
  • Software support for Windows and VxWorks
  • Example logic cores for all FPGA interfaces


  • Modular for building complete systems. Four I/O ports enable connection to external systems or other cards in the same system
  • Higher performance than conventional DSP’s
  • Largest Virtex-II FPGA’s reduce need for partitioning application across multiple FPGA’s
  • 64-bit precision arithmetic is supported by the 64-bit data width of all the memory interfaces and the PCI controller, while 32, 16, and 8 bit word widths are also supported
  • PCI controller achieves 500MBytes/sec sustained (not just peak) for fastest possible communication with other cards
  • Four programmable clocks drive multiple clock domains with low jitter needed by DDR/QDR memory
  • High current power supplies and on-board cooling enable FPGA to deliver maximum processing power