Sundance’s new off-the-shelf IEEE-754 FFT / IFFT Floating Point core is the most efficient available in the FPGA world. Designed for high performance programmable devices from Xilinx, this FFT core performs long transforms ranging from 32 points to 64M points with external memory connected to the FPGA, such as ZBT SRAM, QDR2 SRAM or DDR2 SDRAM. Its architecture allows the user to change the transform length on the fly without having to reconfigure the programmable device, which makes it a very flexible component for systems with complex algorithms. Based on a radix-2 architecture, it also saves memory resources compared to other floating point cores available on the market.
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Data formats
- IEEE-754
- 24-bit mantissa, 8-bit exponent, 2’scomplement
- 14-bit mantissa, 8-bit exponent, 2’scomplement
- Specific data format upon request.
Target devices
Xilinx Virtex-II, Virtex-II Pro, Virtex-4, Spartan-3, Virtex-5.
Device resources usage and Fmax
| Device | Slices | Multipliers/DSP48(E) | Block RAMs | Fmax |
|---|---|---|---|---|
| Virtex-5 XC5VLX50T -3 |
6220 | 40 | 36 | 240.7 MHz |
| Virtex-4 XC4VLX40 -12 |
12394 | 40 | 36 | 200.2 MHz |
| Virtex-II Pro XC2VP40 -7 |
12293 | 40 | 36 | 175 MHz |
| Spartan-3 XC3S4000-5 |
12835 | 40 | 36 | 105.3 MHz |
Table 1: Device resources usage and Fmax
| FFT/IFFT transform size | Processing time | Sustained throughput in MSPS |
|---|---|---|
| 256 | 3.68µs | 69.6 |
| 512 | 6.24µs | 82.1 |
| 1024 | 11.4µs | 90.1 |
| 2048 | 31.8µs | 64.3 |
| 4096 | 61.4µs | 66.7 |
| 8192 | 123µs | 66.7 |
| 16384 | 246µs | 66.7 |
| 32768 | 492µs | 66.7 |
| 65536 | 1.31ms | 50.0 |
| 131072 | 2.62ms | 50.0 |
| 262144 | 5.24ms | 50.0 |
| 524288 | 10.5ms | 50.0 |
| 1048576 | 21ms | 50.0 |
Table 2: FFT execution time
Device resources usage and Fmax (pipelined FFT core)
| Device | FFT length | Slices | Multipliers/DSP48(E) | Block RAMs | Fmax |
|---|---|---|---|---|---|
| Virtex-5 XC5VLX110T -3 |
8192 | 36592 | 44 | 61 | 250 MHz |
| Virtex-5 XC4VLX110T -3 |
1024 | 27403 | 32 | 19 | 250 MHz |
| Virtex-5 XC5VSX95T -2 |
16384 | 27799 | 256 | 109 | 200 MHz |
| Virtex-5 XC5VSX50T -3 |
1024 | 20562 | 176 | 19 | 250 MHz |
| Virtex-4 XC4VSX55 -12 |
1024 | 21585 | 352 | 26 | 250 MHz |
Table 3: Device resources usage and Fmax (pipelined FFT IP core)
The following graph displays the Signal to Noise Ratio of a Fast Fourier Transform performed over a 1024 points random vector with a 24-bit wide mantissa and 8-bit wide exponent. The software Discrete Fourier Transform was calculated using the FFTw functions.
A fully functional VHDL testbench and MATLABtm functions are delivered along the FFT/IFFT core for simulation purposes and specific performance characterization.