Exploring the VCS³ 3D Kit: Dual-Camera Vision and FPGA Acceleration

How much processing can you move off the CPU when building an embedded vision system?

Leonardo Capossio has been exploring this question with Sundance’s VCS³ 3D Kit. Across three LinkedIn updates, he takes a closer look at the hardware, establishes a software baseline for dual-camera motion detection, then combines FPGA acceleration with a live motion and orientation display.

All credits go to Leonardo Capossio, thank you for taking the time to explore the kits capabilities. Be sure to check out Leo’s LinkedIn where you can keep up with all of his latest projects! 

A Closer Look at the Hardware

Leo’s first update explores the compact hardware behind the kit. At its centre is the 30 × 50 mm VCS³ Core, bringing together a Zynq UltraScale+ MPSoC, quad-core Arm Cortex-A53 processing, FPGA fabric and LPDDR4 memory.

He highlights the device’s TSMC InFO packaging, which helps fit this processing capability into a small footprint. Alongside the core, the kit includes two cameras, a display and a nine-axis inertial measurement unit (IMU), providing a platform for experimenting with embedded vision and motion sensing.

Starting with Dual-Camera Motion Detection

The next step was a practical camera test. Leo implemented dual-camera motion detection running entirely on the Zynq UltraScale+’s Arm cores, with detection boxes drawn live on the kit’s display.

He reported both camera streams running at approximately 10 frames per second, with 64% CPU load.

This established a software baseline before moving the motion detection into the FPGA fabric. It also raised a useful development question: how much CPU capacity could be freed for other tasks?

Adding FPGA Acceleration and Live IMU Data

In his following update, Leo demonstrated both cameras running alongside a live display of data from the kit’s ICM-20948 nine-axis IMU.

Read at 102 Hz, the sensor data powered an on-screen display featuring:

• An artificial horizon

• Compass heading

• Roll and pitch

• A gyroscope trace

• Raw accelerometer and magnetometer values

With camera motion detection now running in the FPGA fabric, Leo reported that the Arm cores remained below 5% load, while the camera streams and IMU display operated together.

Making Room for More

Leo’s demonstrations show a practical progression from software processing to hardware acceleration. Moving motion detection into the FPGA fabric reduced the reported Arm CPU load, leaving more processing capacity available for additional application tasks.

The results are specific to Leo’s demonstrations, but they illustrate the value of combining Arm processors, programmable logic, cameras and motion sensing in one development platform.

Thank you to Leo for sharing his work and documenting each stage. Follow Leonardo Capossio on LinkedIn to watch the demonstrations and keep up with his next updates.